An Ecient P Ath Delay F Ault Coverage Estimator
نویسندگان
چکیده
|We propose a linear complexity method to estimate robust path delay fault coverage in digital circuits. We adopt a path counting scheme for a true-value simulator that uses ags for each signal line. These ags determine the new path delay faults detected by the simulated vector pair. Experimental results are presented to show the e ectiveness of the method in estimating path delay fault coverage.
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